Show Posts

This section allows you to view all posts made by this member. Note that you can only see posts made in areas you currently have access to.


Topics - mike_s

Pages: [1]
1
TFTs / NHD-5.0-800480TF-ATXL#-CTP VS. NHD-7.0-800480EF-ASXN#-CTP
« on: June 19, 2019, 05:54:59 AM »
Hi All,

I have a current project using an STM32H7 micro, which has a built-in LTDC display controller.  I have it working fine with the 5.0" display as mentioned in the topic.

I wanted to then see how much better it would be with the 7.0" display, which appears to be an identical electrical interface, with the exception of the LCD Backlight voltage being 9.6V on the 7.0" versus 19.2V on the 5.0".

I realize the controller chips changed:

1) 5.0" ==  ILI6126C
2) 7.0" == HX8264-D02


I tried the 7.0" display on both of my boards (which both work fine with 5.0" displays), and I get absolutely nothing on the screens except for the initial white backlight when it first boots up...

I've played with the timings, I/O drive strength, pixel clock, etc, with zero effect. 

I did notice that the PCLK on the 5.0" says it's rising edge triggered, versus the 7.0" which is falling edge triggered.. but I haven't tried inverting the PCLK polarity yet, do I need to make that change for the 7.0" TFT?

Is anyone aware of anything else that may need to be changed when going from the ILI6126C controller to the HX8264??


(I've opened an RMA request suspecting that the display may be bad, but I realize they do test these screens before they are shipped out, so I wonder if there is still something I'm missing???)


Thanks so much,

- Mike

2
TFTs / Image Alignment - 480x272 image on 800x480 TFT
« on: January 12, 2019, 06:09:24 PM »
Hi Everyone,

I'm just getting through some initial debugging on my board using an STM32H7, connected to the :  NHD-5.0-800480TF-ATXL-CTP
(800x480 TFT)

I'm using the STM32H7 built-in LTDC display controller... STM has sample code/etc for testing out the LCD screen, etc..

so their eval setup used a 480x272 LCD display, whereas I'm using this one above, 800x480..

so after setting up the params correctly, I can display their test image, but I would have expected for the image to have started at the left-side origin, but there is some blank space...

What I'm wondering is if this could happen from an I/O being wrong or shorted?  or would I see scrambled data if that was the case?

3
TFTs / Active Lo/Active Hi signals for these TFTs?
« on: January 06, 2019, 12:36:45 PM »
Hi Everyone,

I'm currently working on my initial setup with this TFT: NHD-5.0-800480TF-ATXL-CTP

The datasheets don't specifically call out or mark the signals as Active Hi or Active Lo... these are the signals for this panel:

 
Pin No.    Symbol    External Connection    Function Description       
1    LED-    LED Power Supply    Ground for Backlight    
 
2    LED+    LED Power Supply    Backlight Power Supply (60mA @ ~19.2V)       
3    GND    Power Supply    Ground       
4    VDD    Power Supply    Power supply for LCD and logic (3.3V)       
5-12    [R0-R7]    MPU    Red Data Signals       
13-20    [G0-G7]    MPU    Green Data Signals       
21-28    [B0-B7]    MPU    Blue Data Signals       
29    GND    Power Supply    Ground       
30    CLKIN    MPU    Clock for input data (Rising Edge)       
31    STBYB    MPU    1: Normal Operation;0: Standby Mode       
32    HSD    MPU    Line synchronization signal      ****   PULL-UP?  ****
33    VSD    MPU    Frame synchronization signal      ****  PULL-UP? ****
34    DEN    MPU    Data Enable signal       
35    NC    -    No Connect       
36    GND    Power Supply    Ground       
37    XR    -    No Connect       
38    YD    -    No Connect       
39    XL    -    No Connect       
40    YU    -    No Connect    


 
Pin No.    Symbol    External Connection    Function Description       
1    VCC    Power Supply    Power supply for logic (3.0V)       
2    GND    Power Supply    Ground       
3    SCL    MPU    Serial I2C Clock (Requires pull-up resistor)       
4    SDA    MPU    Serial I2C Data (Requires pull-up resistor)       
5    /INT    MPU    Interrupt signal from touch panel module to host        ****   PULL-UP  ****
6    /RESET    MPU    Active LOW Reset signal                                        ****   PULL-UP  ****



From the timing diagrams, It seems that ONLY  VSD, HSD, INT, & RESET are active LO signals?  all the rest are Active HI, ie default state is pulled down..

Can anyone verify that this is correct, ONLY VSD, HSD, INT, & RESET need to be pulled-up?

Thanks so much,

- Mike



Pages: [1]