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11
TFTs / Re: SPI problem with NHD-3.5-320240FT-CSXN-CTP
« Last post by Ted_M on April 05, 2018, 11:57:37 AM »
Hi Rainer,

Unfortunately we have not tested this using an MPSSE interface.  If you find any issues using this type of interface, please report them here for us to help.
         
12
TFTs / Re: Display Font related issue
« Last post by darshana somarajan on April 05, 2018, 05:00:09 AM »
Sir,
Sorry for the delay as I was mapped to some other work and now I am back to the loop, I am using bitmap format
Arial Narrow 14pts W
const uint_8 arialNarrow_14ptBitmaps[] =
{
   // @0 'W' (13 pixels wide)
   0x82, 0x08, // #     #     #
   0x82, 0x08, // #     #     #
   0x85, 0x08, // #    # #    #
   0x85, 0x08, // #    # #    #
   0x85, 0x08, // #    # #    #
   0x48, 0x90, //  #  #   #  #
   0x48, 0x90, //  #  #   #  #
   0x48, 0x90, //  #  #   #  #
   0x48, 0xD0, //  #  #   ## #
   0x50, 0x50, //  # #     # #
   0x50, 0x50, //  # #     # #
   0x50, 0x50, //  # #     # #
   0x20, 0x20, //   #       # 
   0x20, 0x20, //   #       # 
};
13
TFTs / Re: SPI problem with NHD-3.5-320240FT-CSXN-CTP
« Last post by Wiggum on April 05, 2018, 02:39:31 AM »
Hi Ted,

BTW: Did you ever test the MPSSE cable communication?
Your example projects on github are only configured to your modules correctly for the Arduino platform.

Best regards,

Rainer
14
I think I figured this all out.  Basically the PNP transistor is an emitter follower used to provide a low-source-impedance for the "GND" supply pin of the quad op-amp which buffers a 5-resistor divider for the LCD bias voltages!  It also directly provides one of the bias voltages to the 4 LCD driver ICs.  Here is a pic of the updated schematic:

https://drive.google.com/file/d/1PqlK9YAYjldn9mCpSbASfeHmY1gFXlMD/view?usp=sharing

As I see it, there is no great re-population option using the existing pads.  I'm not a fan of adding resistance in series with op-amp supply pins, but especially in this case where the op-amp current over temperature may change the static bias condition which may have a noticeable affect on the contrast ... but it might be ok ... I just haven't tested it either way.  Another possibility I've considered is to add a resistor between the PNP base and VEE as there are pads that would allow for easy component placement, however this may have the same bias current issue (maybe worse?).

It seems as though one of the manufacturer's intended options would be to remove the transistor, 0Ω jumper R81, and replace R6 with some resistance that would achieve the desired contrast, again with the op-amp bias current "potential issue".

All of that said, eliminating the op-amp bias current as a source of variability would be as easy as connecting the GND pin directly to VEE after disconnecting it from the resistor divider.  Since the supply delta would be higher than it "needs" to be, I suppose there may be more heat generated, but again, I haven't tested that.  Note that the V5 connections of the LCD drivers still need to maintain this connection for proper LCD bias.

Again, if anyone has any results related to the options above or others, please share!!!

Below are links to the PNP transistor (2SB1198K), the quad op-amp (AS324M) and the LCD driver (NT7086PQ).  Though not in my schematic, I have also included the datasheet for the MCU interface (RA6963):

2SB1198K
https://www.rohm.com/datasheet/2SB1198K/2sb1198k

AS324M
https://www.diodes.com/assets/Datasheets/AS324_A.pdf

NT7086PQ
https://www.crystalfontz.com/controllers/NT7086.pdf

RA6963
https://www.newhavendisplay.com/app_notes/RA6963.pdf
15
TFTs / Re: SPI problem with NHD-3.5-320240FT-CSXN-CTP
« Last post by Ted_M on April 04, 2018, 12:00:22 PM »
Hi Rainer,

The added buffers (74LCX125) on the FTDI board allow the SPI master and slave interface of the FT8xx to be 5v tolerant. 
Our board will support the 3.3v SPI interface and is not 5v tolerant. Thanks for your input and let us know what you find.

Best Regards,
Ted
16
TFTs / Re: SPI problem with NHD-3.5-320240FT-CSXN-CTP
« Last post by Wiggum on April 04, 2018, 10:42:51 AM »
Hi Ted,


thanks for your response. The MPSSE cable can indeed not drive the current. That's why I am using an external power supply (connecting the GNDs, of course).
With that, I was able to reduce the supply voltage to 2.9V and see that it works, there.

The MPSSE is not my main concern. It is our custom board with the Tiva processor.
Comparing the NHD circuit with that on the VM800 board by FTDI, I see buffers (74LCX125) on the FTDI board which are not used on the NHD board.
I am suspecting that it's the SPI communication.
As said, the FTDI display works flawlessly in all our configurations.

I am digging into this and will report but would appreciate any hint.

Best regards,

Rainer

17
TFTs / Re: SPI problem with NHD-3.5-320240FT-CSXN-CTP
« Last post by Ted_M on April 04, 2018, 10:11:03 AM »
Hi Rainer,

The MPSSE cable may not supply enough current to drive the display and the backlight on it's own.  Please describe how the display is receiving power in your configuration. 

Try connecting this display to an Arduino using our NHD-FT81x-SHIELD for easier prototyping.  It has a built in Buck regulator that will supply the proper power to the display and also drive the backlight.

http://www.newhavendisplay.com/userguides/NHD-FT81x-SHIELD_User_Guide.pdf

Best Regards,
Ted
18
TFTs / Re: SPI problem with NHD-3.5-320240FT-CSXN-CTP
« Last post by Wiggum on April 04, 2018, 04:51:19 AM »
Anyone?

I also contacted NHD via their official support form. They seem to be rather unresponsive, unfortunately.

Regards,

Rainer
19
TFTs / NHD-7.0-800480EF-ASXN Unable to get LCD to display colors
« Last post by tom_24 on April 04, 2018, 03:47:15 AM »
Hi all,
I have the problem that my NHD-7.0-800480EF-ASXN display doesn´t display the colors that I want.
I can display the color white, but every other color will shown in diffrent shades of blue.
I uses the NHD-4.3-480272MF-20 Controller Board with an SSD1963 controller chip.

I hope that somebody can help me. Thanks for your help :)

Regards Tom

The source code that i use:

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f4xx_hal.h"

/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

/* Private variables ---------------------------------------------------------*/

/* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/
volatile uint16_t LCD_W=800;
volatile uint16_t LCD_H=480;

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);

/* USER CODE BEGIN PFP */
/* Private function prototypes -----------------------------------------------*/

/* USER CODE END PFP */

/* USER CODE BEGIN 0 */

void SendData(unsigned long color)
{
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);       //RS,high

  uint16_t k = color>>8;
  uint16_t l = k<<4;
   GPIOE->ODR = l;
 
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET);      //WR, Low
   __ASM("nop");
   __ASM("nop");
   __ASM("nop");
   //HAL_Delay(1);
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_SET);        //WR, High
   __ASM("nop");
   __ASM("nop");
   __ASM("nop");

   uint16_t m = color<<4;
   GPIOE->ODR = m;
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET);      //WR, Low
   __ASM("nop");
   __ASM("nop");
   __ASM("nop");
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_SET);        //WR, High
   __ASM("nop");
   __ASM("nop");
   __ASM("nop");

}

 void writeCMD(unsigned char a)
{
   int16_t b;
   b = a<<4;
   GPIOE->ODR = b;
   
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_RESET);  //RS,low
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET);  //WR,low
   HAL_Delay(1);
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_SET);       //WR,high
   HAL_Delay(1);
}

 void writeData(uint16_t a)
{
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);    //RS,high
   
   int16_t b;
   b = a<<4;
   GPIOE->ODR = b;
   
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET);   //WR,low
   HAL_Delay(1);
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_SET);     //WR,high
   HAL_Delay(1);
   
}

void CMDwrite(int8_t REG, int8_t VALUE)
{
  writeCMD(REG);
   //HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);
   writeData(VALUE);
}

void lcd_init(void)
{
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);         //Display ON, High

   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_3, GPIO_PIN_RESET);      //CS, Low
   
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_2, GPIO_PIN_SET);         //RD, High
   
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_1, GPIO_PIN_RESET);      //WR, Low
   
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_6, GPIO_PIN_RESET);      //REST, Low
   HAL_Delay(5);
   
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_6, GPIO_PIN_SET);         //REST, High
   HAL_Delay(100);
   
   writeCMD(0x01);                                                               //Software reset
  HAL_Delay(10);
  writeCMD(0x01);                                                               //Software reset
  HAL_Delay(10);
  writeCMD(0x01);                                                               //Software reset
   HAL_Delay(10);
   
   CMDwrite(0xe0,0x01);                                                      //Enable PLL
   CMDwrite(0xe0,0x03);                                                      //Lock PLL, Enable PLL
   
   writeCMD(0xb0);                                                               //SET LCD mode
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);    //RS,high
   writeData(0x08);
   writeData(0x80);   
   writeData(0x03);
   writeData(0x1f);   
   writeData(0x01);
   writeData(0xdf);
   writeData(0x00);
   
   CMDwrite(0xf0,0x03);                                                         //SET pixel data interface format=8bit
   CMDwrite(0x36,0x09);
   //CMDwrite(0x3A,0x60);
   
   writeCMD(0xe2);                                                                //SET multiplier and divider of PLL
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);      //RS,high
   writeData(0x22);
   writeData(0x03);
   writeData(0x04);
   
   writeCMD(0xe6);                                                                //SET the pixel clock freq
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);      //RS,high
   writeData(0x02);
   writeData(0xff);
   writeData(0xff);
   
   writeCMD(0xb4);                                                                     
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);      //RS,high
   writeData(0x20);
   writeData(0xaf);
   writeData(0x00);
   writeData(0xa3);
   writeData(0x07);
   writeData(0x00);
   writeData(0x00);
   writeData(0x00);
   
   writeCMD(0xb6);                                                                  
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);      //RS,high
   writeData(0x01);
   writeData(0xef);
   writeData(0x00);
   writeData(0x04);
   writeData(0x01);
   writeData(0x00);
   writeData(0x00);
   
   writeCMD(0x2a);
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);    //RS,high
   writeData(0x00);
   writeData(0x00);
   writeData(0x03);
   writeData(0x1f);
   
   writeCMD(0x2b);
   HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);    //RS,high
   writeData(0x00);
   writeData(0x00);
   writeData(0x01);
   writeData(0xdf);
   
   //writeCMD(0x13);                                                          //enter normal mode
   writeCMD(0x29);                                                             //SET display on
   HAL_Delay(10);

}
void WindowSet(unsigned int s_x,unsigned int e_x,unsigned int s_y,unsigned int e_y)
{
    writeCMD(0x2a);              //SET column address
    writeData((s_x)>>8);         //SET start column address
    writeData(s_x);
    writeData((e_x)>>8);         //SET end column address
    writeData(e_x);
   
    writeCMD(0x2b);      //SET page address
    writeData((s_y)>>8);         //SET start page address
    writeData(s_y);
    writeData((e_y)>>8);         //SET end page address
    writeData(e_y);
}
void LCDclear(unsigned long colour)
{
    uint16_t i,j;
    WindowSet(0,799,0,479);               //set start/end column/page address (full screen)
    writeCMD(0x2C);              //command to begin writing to frame memory#
      HAL_GPIO_WritePin(GPIOD, GPIO_PIN_0, GPIO_PIN_SET);    //RS,high
    for(i=0; i<799; i++)
        {
            for(j=0; j<479; j++)
                {
                           SendData(colour);
                }
        }
}
/* USER CODE END 0 */

/**
  * @brief  The application entry point.
  *
  * @retval None
  */
int main(void)
{
  HAL_Init();

  SystemClock_Config();

  MX_GPIO_Init();

   lcd_init();
    writeCMD(0x29);

  WindowSet(0,799,0,479);
  LCDclear(0x1234);
  while (1)
  {
        LCDclear(0xFFE0); //gelb
   HAL_Delay(10);
        LCDclear(0xF800);  //rot
   HAL_Delay(10);
        LCDclear(0x001F);
   HAL_Delay(10);

  }
}

/**
  * @brief System Clock Configuration
  * @retval None
  */
void SystemClock_Config(void)
{

  RCC_OscInitTypeDef RCC_OscInitStruct;
  RCC_ClkInitTypeDef RCC_ClkInitStruct;

    /**Configure the main internal regulator output voltage
    */
  __HAL_RCC_PWR_CLK_ENABLE();

  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

    /**Initializes the CPU, AHB and APB busses clocks
    */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLM = 8;
  RCC_OscInitStruct.PLL.PLLN = 336;
  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  RCC_OscInitStruct.PLL.PLLQ = 7;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    _Error_Handler(__FILE__, __LINE__);
  }

    /**Initializes the CPU, AHB and APB busses clocks
    */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
  {
    _Error_Handler(__FILE__, __LINE__);
  }

    /**Enables the Clock Security System
    */
  HAL_RCC_EnableCSS();

    /**Configure the Systick interrupt time
    */
  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);

    /**Configure the Systick
    */
  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);

  /* SysTick_IRQn interrupt configuration */
  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
}

/** Configure pins as
        * Analog
        * Input
        * Output
        * EVENT_OUT
        * EXTI
*/
static void MX_GPIO_Init(void)
{

  GPIO_InitTypeDef GPIO_InitStruct;

  /* GPIO Ports Clock Enable */
  __HAL_RCC_GPIOE_CLK_ENABLE();
  __HAL_RCC_GPIOH_CLK_ENABLE();
  __HAL_RCC_GPIOA_CLK_ENABLE();
  __HAL_RCC_GPIOD_CLK_ENABLE();

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOE, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7
                          |GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11, GPIO_PIN_RESET);

  /*Configure GPIO pin Output Level */
  HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
                          |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
                          |GPIO_PIN_6|GPIO_PIN_7, GPIO_PIN_RESET);

  /*Configure GPIO pins : PE4 PE5 PE6 PE7
                           PE8 PE9 PE10 PE11 */
  GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7
                          |GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);

  /*Configure GPIO pin : PA0 */
  GPIO_InitStruct.Pin = GPIO_PIN_0;
  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

  /*Configure GPIO pins : PD12 PD13 PD14 PD15
                           PD0 PD1 PD2 PD3
                           PD6 PD7 */
  GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
                          |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
                          |GPIO_PIN_6|GPIO_PIN_7;
  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
  GPIO_InitStruct.Pull = GPIO_NOPULL;
  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);

  /* EXTI interrupt init*/
  HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0);
  HAL_NVIC_EnableIRQ(EXTI0_IRQn);

}

/* USER CODE BEGIN 4 */

/* USER CODE END 4 */

/**
  * @brief  This function is executed in case of error occurrence.
  * @param  file: The file name as string.
  * @param  line: The line in file as a number.
  * @retval None
  */
void _Error_Handler(char *file, int line)
{
  /* USER CODE BEGIN Error_Handler_Debug */
  /* User can add his own implementation to report the HAL error return state */
  while(1)
  {
  }
  /* USER CODE END Error_Handler_Debug */
}
20
The contrast of the LCD module referenced in the subject can be adjusted by adding a variable resistor between the VEE (negative supply), GND and Vo (input for contrast adjustment).  When tracing where the interface header pins are connected, there appears to be resistor pads that will allow either a variable or fixed contrast setting directly on the module.  As this display is replacing a different type of display, I don't want to require external components for this purpose.

LCD Module Datasheet
http://www.newhavendisplay.com/specs/NHD-24064WG-ATMI-VZ.pdf

The component locations in question are R6, R7, VR1, R81, R82 and Q2.  The stock configuration has 0Ω jumpers at R6 and R7 and I believe Q2 is a PNP 2SB1198K based on the device markings.  VR1, R81 and R82 are not populated.  I have included pictures of the actual PCB and a hand-drawn schematic as I see it.  Note that there is one node in the schematic that I couldn't determine it's connection, but it would appear to be a supply connection with voltage greater than VEE.

PCB Pic
https://drive.google.com/file/d/16jXv-sHyCCeZJNZ5DiD4IcRW3le5C8zT/view?usp=sharing

Schematic
https://drive.google.com/file/d/1J5-4T_tRys4E7q0ERLoMKyxhm93RwZrx/view?usp=sharing

I am sure there must be a configuration that would only require a change in population (no cuts or jumps) otherwise why would they bother to include all these component locations ... ESPECIALLY when you see the pads for the variable resistor (VR1)!

The transistor is what is throwing me.  I would like to know what it's purpose is in the default configuration.  If R6, R7 and Q2 were removed, a fixed voltage divider can be created using R6 and R81 and a 0Ω jumper at R82, just as recommended for the external voltage divider.  Obviously, this could be adjustable by populating a pot for VR1 and not populating R6.

If any of you have been down this road before, I would appreciate you sharing your experience!
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