Author Topic: TFT Display with Beagle Green  (Read 1711 times)

imsaditya

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TFT Display with Beagle Green
« on: January 02, 2019, 06:32:49 AM »
Hi,
We are using Beagle Bone green board. Using default(pre built Linux image) linux image on beagle bone green board. Linux Kernel booting on the board.
When i have connected NHD display "NHD-5.0-800480TF-ATXL#-CTP" and power On the board, board does not  boots  as the board LEDS are not blinking
And  no display on the NHD display.

The connection details between NHD display and beagle green board is attached:

Could you kindly suggest if i need to check any configuration or configuration change that enable LCD display on beagle green board
Thanks,
Aditya

Sergio_M

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Re: TFT Display with Beagle Green
« Reply #1 on: February 19, 2019, 11:36:06 AM »
Hello,

Our 5.0” TFT is a “raw pixel-dot-clock” display and does not have an SPI/parallel type controller or any kind of RAM.
The display is supposed to be constantly refreshed, at 60Hz, with a pixel clock, V sync, H sync, etc.
There are some high-end processors such as that used in the BeagleBone that can natively support such RGB TTL display.
You would also need an LED driver circuit to drive the backlight separately.

Please note we sell a 7.0” BeagleBone Black cape (NHD-7.0CTP-CAPE-L) it’s an open source hardware and the schematic is available for your reference, the pinout is similar to our 5” TFT.

Please view the links below:
Product specification: http://www.newhavendisplay.com/specs/NHD-7.0CTP-CAPE-V.pdf
User Guide: http://www.newhavendisplay.com/specs/NHD-7.0CTP-CAPE-V.pdf

NHD-5.0-800480TF-ATXL#-CTP data sheet: http://www.newhavendisplay.com/specs/NHD-5.0-800480TF-ATXL-CTP.pdf

Best Regards,

v8dave

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Re: TFT Display with Beagle Green
« Reply #2 on: May 12, 2019, 10:01:57 PM »
As you sell a 7" cape for the Beagle Bone, do you have the kernel configuration for this display?

I am trying to get a NHD-7.0-800480EF-ASXN#-CTP to work with an Android build. Using the following timings I do not get anything. I've checked all of the signal inputs to the LCD and HSYNC, VSYNC, CLK etc are all on the correct pins. I am using the following timing.

static struct nxp_lcd wvga_axon = {
   .width = 800,
   .height = 480,
   .p_width = 155,
   .p_height = 93,
   .bpp = 24,
   .freq = 40,

   .timing = {
      .h_fp = 40,
      .h_bp = 88,
      .h_sw = 48,
      .v_fp = 13,
      .v_fpe = 1,
      .v_bp = 32,
      .v_bpe = 1,
      .v_sw = 3,
   },
   .polarity = {
      .rise_vclk = 1,
      .inv_hsync = 1,
      .inv_vsync = 1,
      .inv_vden = 0,
   },
   .gpio_init = nhd_gpio_init,
};


Ted_M

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Re: TFT Display with Beagle Green
« Reply #3 on: May 13, 2019, 08:29:49 AM »
Hi V8Dave,

Try these RGB timing values for the NHD-7.0-800480EF-ASXN#-CTP

Width = 800;
Height = 480;
HCycle =  928;
HOffset = 88;
HSync0 = 0;
HSync1 = 48;
VCycle = 525;
VOffset = 32;
VSync0 = 0;
VSync1 = 3;
PCLK = 2;
Swizzle = 0;
PCLKPol = 1;
CSpread = 0;
Dither = 1;

Best Regards,


v8dave

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Re: TFT Display with Beagle Green
« Reply #4 on: May 14, 2019, 01:56:57 AM »
I have the display working with the settings I posted earlier except that there is some tearing on the edges of text and graphics. Very slight but noticable and I am sure it should be rock solid as previous use with a different processor was good and stable.

My issue was that I needed to apply these setting in u-boot and not just in the kerne so now I have something partially working.

What would cause slight tearing in the display?

Lastly, what is the drive current for the inputs? My S5P6818 processor can set the driver current on the GPIO and I was wondering what this should be set to. I don't see any real difference in choosing default or 0 to 3 for each output.


v8dave

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Re: TFT Display with Beagle Green
« Reply #5 on: May 14, 2019, 09:13:28 PM »
Here is a video of the tearing and the extra dots appearing on the display. The display is rotated for now until I fix the Android build to rotate to landscape.

https://youtu.be/NmyMciQCH5I

I made some small changes to the timing below to leave the HSYNC and VSYNC as active low. The DEN is active high and the clock is falling edge.

Any ideas about why the display is not stable? By the way, the clock looks good albeit my scope is only 200Mhz so not able to capture the waveform accurately but it is a nice clean 30Mhz.

static struct nxp_lcd wvga_axon = {
   .width = 800,
   .height = 480,
   .p_width = 155,
   .p_height = 93,
   .bpp = 24,
   .freq = 40,

   .timing = {
      .h_fp = 40,
      .h_bp = 88,
      .h_sw = 48,
      .v_fp = 13,
      .v_fpe = 1,
      .v_bp = 32,
      .v_bpe = 1,
      .v_sw = 3,
   },
   .polarity = {
      .rise_vclk = 0,
      .inv_hsync = 0,
      .inv_vsync = 0,
      .inv_vden = 0,
   },
   .gpio_init = nhd_gpio_init,
};

Paul_B

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Re: TFT Display with Beagle Green
« Reply #6 on: May 15, 2019, 08:13:39 AM »
Hi v8dave!

Interesting video - It looks like your timing is off   :)

Can you please try the following:

Code: [Select]
/* NHD-7.0-800480EF-ATXL# */
panel {
status = "okay";
compatible = "ti,tilcdc,panel";
pinctrl-names = "default";
pinctrl-0 = <&bb_lcd_lcd_pins>;
panel-info {
ac-bias           = <255>;
ac-bias-intrpt    = <0>;
dma-burst-sz      = <16>;
bpp               = <32>;
fdd               = <0x80>;
tft-alt-mode      = <0>;
stn-565-mode      = <0>;
mono-8bit-mode    = <0>;
sync-edge         = <0>;
sync-ctrl         = <0>;
raster-order      = <0>;
fifo-th           = <0>;
};
display-timings {
native-mode = <&timing0>;
timing0: 800x480 {
clock-frequency = <45000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <40>;
hsync-len = <48>;
vback-porch = <29>;
vfront-porch = <13>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;

https://github.com/beagleboard/bb.org-overlays/blob/master/src/arm/BB-BONE-NH7C-01-A0.dts


Note: The 5.0" should have the same timing, however the pixelclk is inverted  ;)




« Last Edit: May 15, 2019, 08:17:33 AM by Paul_B »

v8dave

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Re: TFT Display with Beagle Green
« Reply #7 on: May 16, 2019, 01:58:47 AM »
Interesting that you have the hor back porch at 40 when the datasheet shows 88. It works with 40 but I still get tearing.

I need to investigate the timing more and try and setup a logic analyser on HSYNC, VSYNC, CLOCK and a couple of the RGB lines.

Paul_B

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Re: TFT Display with Beagle Green
« Reply #8 on: May 16, 2019, 08:16:43 AM »
Thanks for the update! Are you using jumper wires to prototype with or did you spin a custom PCB?

You can try placing some 220pf caps on the HSYNC, VSYNC, and CLOCK lines.

v8dave

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Re: TFT Display with Beagle Green
« Reply #9 on: May 16, 2019, 09:38:13 AM »
It is a custom 4 layer PCB with ground plane on top and bottom as well as an internal plane connected to ground with via stitching top and bottom and also to the internal plane.

It seems better now with a little more drive strength from the CPU but still some tearing on the edges. There is a phase adjustment on the CPU clock but that doesn't appear to have been implemented in the kernel so I am busy trying to work out if I can add this to the kernel driver.

I was thinking also to add a series resistor of about 100R in the clock line. I've seen this fix an issue before. I can increase the drive on the CLK GPIO if I do this.

One of the issues I've seen before but doesn't affect this manufacturer's own LCD is that the clock does not have a GND guard on each side of the FPC cable. I am using as short a cable as I can of about 12cm. The clock runs next to HSYNC with GND on one side.

I'll try the 220pf CAPS in the next few days after I order some up. :)

 

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