Author Topic: y-axis of image is offset : SSD1963 for NHD-5.0-800480TF-ATXL#-CTP -  (Read 933 times)


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When I set the pixel write window its always -6 pixels on y-axis or the 479 axis.

This means when set a window of WindowSet(x1,x2,y1,y2)  --> WindowSet(0,799,0,479)
Code: [Select]
void WindowSet(unsigned int s_x,unsigned int e_x,unsigned int s_y,unsigned int e_y)
  TFT_Write_Command(0x2a);    //SET column address
  digitalWrite(RS, HIGH);
  TFT_Write_Data((s_x)>>8);     //SET start column address
  TFT_Write_Data((e_x)>>8);     //SET end column address
  TFT_Write_Command(0x2b);    //SET page address
  digitalWrite(RS, HIGH);
  TFT_Write_Data((s_y)>>8);     //SET start page address
  TFT_Write_Data((e_y)>>8);     //SET end page address

The top 6 pixel rows are not visible(because its off screen) while the lowest 6 pixel rows at the bottom are not written to.

This would imply that the reference point of the image array is incorrect but window size was declared properly, and the starting locations appear to be correct also.

Is there some command I'm overlooking in the controller manual that would properly align my window?

After experimenting, I've simply expanded the window size from 479 to 491 and added a offset of +7 for the window to make everything line up with the display window.
There is no issue with the x-axis, I don't know why the y-axis has a issue.
« Last Edit: August 28, 2016, 06:38:35 PM by davidb »


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Re: y-axis of image is offset : SSD1963 for NHD-5.0-800480TF-ATXL#-CTP -
« Reply #1 on: August 30, 2016, 04:17:49 PM »
This could also have to do with the display either being in Sync or DE mode, or the polarity of the clock.

We have seen the display shift when a the settings above have been changed, can you confirm whether you are using sync or de mode.
Also if you are on the rising or falling edge of the pixel clock?


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Re: y-axis of image is offset : SSD1963 for NHD-5.0-800480TF-ATXL#-CTP -
« Reply #2 on: September 01, 2016, 02:09:43 AM »
I started with the default code version and made a few changes

Code: [Select]
  TFT_Write_Command(0x01);         //Software reset
  TFT_Write_Command(0xe2);         //set multiplier and divider of PLL
  digitalWrite(RS, HIGH);
  TFT_Command_Write(0xe0,0x01);    //Enable PLL
  TFT_Command_Write(0xe0,0x03);    //Lock PLL
  TFT_Write_Command(0x01);         //Software reset
  TFT_Write_Command(0xb0);    //SET LCD MODE  SET TFT 18Bits MODE
  digitalWrite(RS, HIGH);
  TFT_Write_Data(0x08);     //SET TFT MODE & hsync+Vsync+DEN MODE
  TFT_Write_Data(0x80);     //SET TFT MODE & hsync+Vsync+DEN MODE
  TFT_Write_Data(0x03);     //SET horizontal size=800-1 HightByte
  TFT_Write_Data(0x1f);     //SET horizontal size=800-1 LowByte
  TFT_Write_Data(0x01);     //SET vertical size=480-1 HightByte
  TFT_Write_Data(0xEB);     //SET vertical size=480-1 LowByte  //df  <----- only changed to try and fix the shifting
  TFT_Write_Data(0x00);     //SET even/odd line RGB seq.=RGB
  TFT_Command_Write(0xf0,0x03);         //SET pixel data I/F format=16bit(compact)    <---- changed to 16 bit mode
  TFT_Command_Write(0x36,0x08);         //SET address mode=flip vertical         <---- Changed from 0x09, (flipped vertical)
  TFT_Write_Command(0xe6);      //SET PCLK freq

I'm not familiar changing "SET TFT MODE & hsync+Vsync+DEN MODE" affects the display so its be left at the default.
« Last Edit: September 01, 2016, 02:12:59 AM by davidb »


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