Recent Posts

Pages: [1] 2 3 ... 10
Character LCDs / Re: NHD-0220FZ-FSW-GBW-P-33V3
« Last post by Alee_S on Today at 09:34:57 AM »
Hi timbro,

For more information on 'Internal Reset Circuit', please see the attachment below, taken from Pg. 22 of the ST7066U controller datasheet. Please note those instructions are executed in the initialization section of the code I have provided.

The LCD working in 1-line mode is a good sign! It seems that under 2-line mode, the LCD is not receiving enough contrast to show the text properly. Try adjusting the contrast voltage on Pin 3, and hopefully that will do the trick.
Character LCDs / Re: NHD-0220FZ-FSW-GBW-P-33V3
« Last post by timbro on Today at 05:37:35 AM »
Hi Alee_S
I found a post on this forum related to a display with the same driver that is 4 x 20 and he was saying that he could only get his display to work in 1-line mode. I decided that I would try changing it to 1-line mode and see if it would work and it certainly did.
So my problem has now advanced to trying to make the display work with both lines. The guy did work out a solution however it is not explained very clearly and I have not been able to work out what the solution actually was. The link to the post is below.,1053.msg2502.html#msg2502

It would be very helpful if you could decipher this guys final comments and let me know what it actually means.

Kind regards,
TFTs / Re: Image Alignment - 480x272 image on 800x480 TFT
« Last post by Ted_M on January 16, 2019, 11:36:23 AM »
Hi Mike,

I have sent you an email with a recommendation to compare the RGB timings in the example code you're using with the RGB timing values in our 5" TFT's datasheet as a starting point.
Let us know if this resolves the issue.

Best Regards,
OLEDs / NHD-3.12-25664UCB2 Contrast Inconsistencies
« Last post by pointbreeze on January 15, 2019, 11:04:54 AM »
Hello. Below are two pictures showing what my display looks like when I run the 0xA5 command, turning all pixels to max brightness GS15, under two different contrast levels. The first contrast level - 0x7F, produces a consistent brightness, but the second contrast level- 0xFF displays regular brightness variations in the horizontal direction. I will also provide my intialization sequence as well. I haven't tried all contrast levels yet, but every contrast level other than 0x7F i have tried seems to also give an irregular display pattern for maximum brightness.

0x7F contrast:

0xFF contrast:

Code: [Select]
oled_send_cmd(oled, SET_CMD_LOCK);
oled_send_data(oled, 0x12); // 0x12 allows the dislplay MCU to receive commands. 0x16 locks MCU

oled_send_cmd(oled, SET_FRONT_CLK_DIV);
oled_send_data(oled, 0x91); // first 4 bits is the clock divider, 0xD0 sets divider to 1. second 4 bits specified frequency of the clock.

oled_send_cmd(oled, SET_MULTIPLEX_RATIO);
oled_send_data(oled, 0x3F); // Sets the number of common pins, each of which control one row. 0x3F corresponds to 64 rows.

oled_send_cmd(oled, SET_DISP_OFFSET);
oled_send_data(oled, 0x0); // Specifies which row the display will start with.
      // 0x0 = starting at row 0. Non zero value will cause vertical wrapping

oled_send_cmd(oled, SET_DISP_START_LN);
oled_send_data(oled, 0x0); // Functionally the same as SET_DISP_OFFSET

oled_send_cmd(oled, SET_REMAP_DUAL_COM);
oled_send_data(oled, 0x06);  // first bit Sets Horizontal Address Increment (writing to display ram will wrap to next row)
         // second bit Sets Column Address Remap - Pixels are represented by nibbles called segments. There are 4 segments in a column.
// This maps Columns 0 - 119 -> SEG(476-479 ~ 0-3 ), backwards.
        // third bit Enables Nibble Re-map. Each nibble in a column maps to pixels in horizontal reading order.
        // fourth bit Rows are displayed first to last
       // fifth bit disables COM Split Odd Even: Com 0 will correspond to Row 0
oled_send_data(oled, 0x0);  // fifth bit disables dual com mode (row's contents are split betwee two coms.)

oled_send_cmd(oled, SET_GPIO); // Disables gpio input pins
oled_send_data(oled, 0x00);

oled_send_cmd(oled, SET_FUNC_SEL);
oled_send_data(oled, 0x01); // Uses internal voltage regulattor

oled_send_cmd(oled, ENHANCE_A);
oled_send_data(oled, 0xA0); // first bit 0 enables external Voltage low reference signal
oled_send_data(oled, 0xB5); // Normal display quality

oled_send_cmd(oled, SET_CONTRAST_CURRENT);
oled_send_data(oled, 0xFF); // Sets contrast leevl of display, higher value gives higher contrast (max 256)

oled_send_cmd(oled, MASTER_CURR_CTRL);
oled_send_data(oled, 0x0F); // first 4 bits - sets output current. Lower values reduce output current.

oled_send_cmd(oled, SET_DEF_LN_GRAYSCALE_TBL); // Uses default gray scale table for brightness of pixels.

oled_send_cmd(oled, SET_PHASE_LENGTH); // first 4 bits, sets phase 1 period to 5 clocks. Second 4 bits sets phase 2 period, set to 7 clocks
oled_send_data(oled, 0xE2);

oled_send_cmd(oled, ENHANCE_B);
oled_send_data(oled, 0x82); // Set to "enhance display performance".
oled_send_data(oled, 0x20); // Required to send, is not configurable

oled_send_cmd(oled, SET_PRE_CHARGE_VOLTAGE);
oled_send_data(oled, 0x1F); // sets precharge voltage to 0.6 * Vcc

oled_send_cmd(oled, SET_SECOND_PRE_CHARGE_PERIOD);
oled_send_data(oled, 0x08); // prechage period is 8 clocks

oled_send_cmd(oled, SET_VCOMH);
oled_send_data(oled, 0x07);  // sets vcomh to 0.86 * Vcc

oled_send_cmd(oled, SET_DISPLAY_WHITE);  // Normal, as opposed to off or inverted

oled_send_cmd(oled, EXIT_PARTIAL_DISP);

oled_send_cmd(oled, SET_SLEEP_MODE_OFF);
Character LCDs / Re: NHD-0220FZ-FSW-GBW-P-33V3
« Last post by Alee_S on January 14, 2019, 04:19:50 PM »
The delay function is set for 1 ms. So a delay(1000) = 1000 ms, or 1 second.

Did you have a chance to review the code provided vs the code used for other displays for their similarities/differences?

Once again, may you please upload images of your hardware connections, along with your measured contrast voltage across both limits of the POT? This would help me get closer to determining where the root issue lies.

Also, if you can provide P/N of some of the other displays you have successfully powered on, I can review their specs to see if there are software/hardware differences between our display and the other displays you have been using.

Hi Michael,
I have figured it out. Love how PhenQ Works
The reason I couldn't make it work was because the reset time for the WR signal is too short, which is 100ns. When I increased it into 1us, it works.
However, when I read the manual for reference, it says the minimum time for Write Control Pulse L Duration is 15ns. My previous code which didn't work definitely meet with this requirement. Did I misunderstand it?


These was the system error you can't proud with due to those pulse control effects
Character LCDs / Re: NHD-0220FZ-FSW-GBW-P-33V3
« Last post by timbro on January 12, 2019, 11:10:21 PM »
Hi Alee_S,
I have a couple of other brands of 5Vdc 1602 LCD displays laying around which we have tested our code on and we are able to make these work ok but we are not able to find the same success with the Newhaven display.
We do not do too many PIC projects so initially we thought it may have been something lacking in our understanding using these devices however, we rebuilt the project using an STM8 device and again, we have only had success with other displays - not the Newhaven display.
I do have 10 of them and have tried two different ones just in the off chance that one was faulty.
Have you configured your delay function for a specific time period? ...and if so what is that period?
TFTs / Image Alignment - 480x272 image on 800x480 TFT
« Last post by mike_s on January 12, 2019, 06:09:24 PM »
Hi Everyone,

I'm just getting through some initial debugging on my board using an STM32H7, connected to the :  NHD-5.0-800480TF-ATXL-CTP
(800x480 TFT)

I'm using the STM32H7 built-in LTDC display controller... STM has sample code/etc for testing out the LCD screen, etc..

so their eval setup used a 480x272 LCD display, whereas I'm using this one above, 800x480..

so after setting up the params correctly, I can display their test image, but I would have expected for the image to have started at the left-side origin, but there is some blank space...

What I'm wondering is if this could happen from an I/O being wrong or shorted?  or would I see scrambled data if that was the case?
Character LCDs / How to access the busy flag over I2C?
« Last post by Mike65 on January 11, 2019, 06:39:16 AM »

I am trying to get a NHD‐C0220BiZ‐FSW‐FBW‐3V3M display to work with an ARM Cortex controller. Instead of bit-banging as described in the sample code I use the Cortex's internal I2C hardware. It seems to work quite well now, but only at clock speeds far below 100kHz, otherwise I get occasional NAKs.
I now would like to interrogate the busy flag BF from my code. Unfortunately I have not succeded quite yet in doing this. According to the datasheet, I have to set RS=0 and R/W=1. But how do I transmit the RS bit to the LCD? When I set R/W=1 in the address byte, an I2C read transaction immediately follows. There is no way to send the command word required to properly set the RS flag. Does anybody know how to do in this case? Neither in the documentation of the display nor in the datasheet of the ST7036i I can find an example.

Best regards

Evaluation Tools / Is the source-code for the NHDev board available?
« Last post by eric.zimmerman on January 08, 2019, 07:37:24 AM »
I am in need of a quick modification of the NHDev board for a proof-of-concept demonstration.
I was hoping to modify the firmware of the NHDev specific to the display that we are hooking up so it display specific content on power-up.
Is this possible?
Pages: [1] 2 3 ... 10