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Messages - v8dave

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1
TFTs / Re: Image Alignment - 480x272 image on 800x480 TFT
« on: May 24, 2019, 02:17:07 AM »
Thanks, Mike,

I am running with a Samsung S5P6818 8 core A53 processor board from FriendlyArm (NanoPC T3 Plus)

I'll try lowering the pixel clock too. Right now it is at 30Mhz. I have the drive level set at 2 for all timing and 1 for the RGB. Values are 0 to 3 for the driver current. I could try 3 and see what it looks like.

My other post shows what I am seeing now and apart from this, the display looks good otherwise.

2
TFTs / Re: NHD-7.0-800480EF-ASXN#-CTP with Android Linux
« on: May 24, 2019, 02:13:27 AM »
I currently have something partially working in that the display is more stable but I still get horizontal tearing when anything on the left of the screen displays anything other than black pixels.

I found I needed 22R resistors in the timing signals and reduce the drive current of the RGB lines to the min value.

The hor back porch timing is actually set to 40 which is the setting from the 5.0" LCD and yet the timing for all of the 7.0" LCD's show this to be 88 but with that I get lots of horrible noise on the display.

The attached image shows the LCD in portrait mode so the tearing or line shift is the left if this was landscape (the portrait/landscape issue is another matter but that is in the Android core so I just need a stable LCD first)

3
TFTs / Re: Image Alignment - 480x272 image on 800x480 TFT
« on: May 22, 2019, 05:39:33 AM »
I was able to add 22R resistors to the CLK, HSYNC, VSYNC and DEN and reduced the drive current on the RGB lines and now I seem to have a more stable display although I do see some horizontal shift when I use anything but black on the left side of the LCD, but it is looking closer now to being a working LCD.

4
It would be great if we could get a sunlight readable display with 1280 x 800 resolution and capacitive touch. I know this would need to be LVDS but that is not an issue with modern processors and or an RGB to LVDS IC board fitted to the back of the LCD panel.

5
TFTs / Re: Image Alignment - 480x272 image on 800x480 TFT
« on: May 20, 2019, 09:04:42 PM »
Thanks Mike

I suspect I have reflection issues as I didn't install any series termination resistors in the lines. I am considering restringing the PCB to add these to the PCB layout but on the prototype, I will try to install these in the clock and the sync as a minimum. I never had to do this with the previous 7" LCD but it does look like I need to do this on this one.

PS. I read up on it and there is no need for meandering on the LCD lines as the clocks are not that fast to need this. A good layout is needed though and in my case, I kept the clock clear of the other lines as I saw issues with this before.

6
TFTs / Re: Image Alignment - 480x272 image on 800x480 TFT
« on: May 17, 2019, 10:06:51 PM »
The offset shown in that image was because the datasheet in 2018 for this TFT had the  HBP (Horizontal Back Porch) value as 88 pixel clocks, which through trial and error testing I found out was waaayyy too high.  I turned out the HBP needed to be in the 40s area.

This is interesting to know. I have a 7.0" with 800x480 and in the timing, it has HBP also as 88 clocks. I got some timing from Newhaven tech that sets the HBP to 40. I have tried this and the display is much better but I still get tearing and some artifacts on the display. Can I ask what other timing values you used for your 5.0" display? I think the 5 and 7 are the same except for the clock which is latched on the positive edges on the 5.0"

Cheers
Dave...

7
TFTs / Re: TFT Display with Beagle Green
« on: May 16, 2019, 09:38:13 AM »
It is a custom 4 layer PCB with ground plane on top and bottom as well as an internal plane connected to ground with via stitching top and bottom and also to the internal plane.

It seems better now with a little more drive strength from the CPU but still some tearing on the edges. There is a phase adjustment on the CPU clock but that doesn't appear to have been implemented in the kernel so I am busy trying to work out if I can add this to the kernel driver.

I was thinking also to add a series resistor of about 100R in the clock line. I've seen this fix an issue before. I can increase the drive on the CLK GPIO if I do this.

One of the issues I've seen before but doesn't affect this manufacturer's own LCD is that the clock does not have a GND guard on each side of the FPC cable. I am using as short a cable as I can of about 12cm. The clock runs next to HSYNC with GND on one side.

I'll try the 220pf CAPS in the next few days after I order some up. :)

8
TFTs / Re: TFT Display with Beagle Green
« on: May 16, 2019, 01:58:47 AM »
Interesting that you have the hor back porch at 40 when the datasheet shows 88. It works with 40 but I still get tearing.

I need to investigate the timing more and try and setup a logic analyser on HSYNC, VSYNC, CLOCK and a couple of the RGB lines.

9
TFTs / Re: TFT Display with Beagle Green
« on: May 14, 2019, 09:13:28 PM »
Here is a video of the tearing and the extra dots appearing on the display. The display is rotated for now until I fix the Android build to rotate to landscape.

https://youtu.be/NmyMciQCH5I

I made some small changes to the timing below to leave the HSYNC and VSYNC as active low. The DEN is active high and the clock is falling edge.

Any ideas about why the display is not stable? By the way, the clock looks good albeit my scope is only 200Mhz so not able to capture the waveform accurately but it is a nice clean 30Mhz.

static struct nxp_lcd wvga_axon = {
   .width = 800,
   .height = 480,
   .p_width = 155,
   .p_height = 93,
   .bpp = 24,
   .freq = 40,

   .timing = {
      .h_fp = 40,
      .h_bp = 88,
      .h_sw = 48,
      .v_fp = 13,
      .v_fpe = 1,
      .v_bp = 32,
      .v_bpe = 1,
      .v_sw = 3,
   },
   .polarity = {
      .rise_vclk = 0,
      .inv_hsync = 0,
      .inv_vsync = 0,
      .inv_vden = 0,
   },
   .gpio_init = nhd_gpio_init,
};

10
TFTs / Re: NHD-7.0-800480EF-ASXN#-CTP with Android Linux
« on: May 14, 2019, 01:58:33 AM »
I have this working. It was the fact I had only made changes in the kernel source but had to make changes to u-boot.

Now it almost works except for some tearing of the display that is visible on the edges of graphics and on text.

11
TFTs / Re: TFT Display with Beagle Green
« on: May 14, 2019, 01:56:57 AM »
I have the display working with the settings I posted earlier except that there is some tearing on the edges of text and graphics. Very slight but noticable and I am sure it should be rock solid as previous use with a different processor was good and stable.

My issue was that I needed to apply these setting in u-boot and not just in the kerne so now I have something partially working.

What would cause slight tearing in the display?

Lastly, what is the drive current for the inputs? My S5P6818 processor can set the driver current on the GPIO and I was wondering what this should be set to. I don't see any real difference in choosing default or 0 to 3 for each output.


12
TFTs / NHD-7.0-800480EF-ASXN#-CTP with Android Linux
« on: May 12, 2019, 10:08:39 PM »
I am trying to get a NHD-7.0-800480EF-ASXN#-CTP display working with Android and I am unable to get anything to display on the LCD. I've used this same LCD before with a small processor running .NET Microframework with great success, albeit a slow interface.

I am using the following timings and checking with a scope to ensure the wiring is correct, I do see the HSYNC, VSYNC, DEN and CLK on the correct pins.

static struct nxp_lcd wvga_axon = {
   .width = 800,
   .height = 480,
   .p_width = 155,
   .p_height = 93,
   .bpp = 24,
   .freq = 40,

   .timing = {
      .h_fp = 40,
      .h_bp = 88,
      .h_sw = 48,
      .v_fp = 13,
      .v_fpe = 1,
      .v_bp = 32,
      .v_bpe = 1,
      .v_sw = 3,
   },
   .polarity = {
      .rise_vclk = 1,
      .inv_hsync = 1,
      .inv_vsync = 1,
      .inv_vden = 0,
   },
   .gpio_init = nhd_gpio_init,
};

I've tried different settings for the polarity with no success. The kernel code has extra debug to confirm the LCD settings are being applied.

Anyone else been able to make this work?

13
TFTs / Re: TFT Display with Beagle Green
« on: May 12, 2019, 10:01:57 PM »
As you sell a 7" cape for the Beagle Bone, do you have the kernel configuration for this display?

I am trying to get a NHD-7.0-800480EF-ASXN#-CTP to work with an Android build. Using the following timings I do not get anything. I've checked all of the signal inputs to the LCD and HSYNC, VSYNC, CLK etc are all on the correct pins. I am using the following timing.

static struct nxp_lcd wvga_axon = {
   .width = 800,
   .height = 480,
   .p_width = 155,
   .p_height = 93,
   .bpp = 24,
   .freq = 40,

   .timing = {
      .h_fp = 40,
      .h_bp = 88,
      .h_sw = 48,
      .v_fp = 13,
      .v_fpe = 1,
      .v_bp = 32,
      .v_bpe = 1,
      .v_sw = 3,
   },
   .polarity = {
      .rise_vclk = 1,
      .inv_hsync = 1,
      .inv_vsync = 1,
      .inv_vden = 0,
   },
   .gpio_init = nhd_gpio_init,
};


14
Customer Projects / Clock and weather display
« on: July 11, 2017, 09:47:40 AM »
Using 2 of the 4.3" sunlight readable displays I built a display to show time and weather data.

The processors on both boards are GHI Electronics G120 with native LCD interface direct to the Newhaven LCD modules. Using .NET Microframework and C#, code for the clock and the weather was done in 1 app. The weather side has a WiFi module so this is used to auto detect which board is running and setup the display.

Additional to the weather screen is power and fridge/freezer temperatures.  ;)

The data itself is transmitted onto the network using MQTT protocol from a number of ESP8266 modules so the display simply listens for this data from the MQTT server.

Additional to the weather side is the local weather forecast from Weather Underground.



The enclosure was designed with 3D CAD software and then all front, rear and side panels made via the Front Panel Express service from Schaeffer-AG in Germany. Top quality for 1 off or small run projects. Not the cheapest option but the finished design is really good.


15
OLEDs / Re: OLED In-rush current
« on: May 03, 2016, 03:26:58 AM »
What is your PCB design like for the power rails to the OLED? Do you have sufficiently wide ground and power rails to it?

Where are you measuring the voltage drop? At the OLED?

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